Basic Info
Port Address:06
Flash/RAM Memory Paging (Bank A)
This page controls what page is swapped into Memory Bank A. On TI84+CE, port 0Eh also affects MemA.
Writing to Port
The current port mapped to Memory Bank A.
TI 83+ Basic: If a RAM page is swapped in, the port reads the RAM page number with bit 6 set. If a ROM page is swapped in, the port reads the ROM page number with bit 6 reset.
83+ Silver, 84+: If a RAM page is swapped in, the port reads the RAM page number with bit 7 set. If a ROM page is swapped in, the port reads the ROM page number with bit 7 reset.
Reading from Port
The page number to swap into Memory Bank A.
83+ Basic: If bit 6 is set, bit 0 will choose between the two RAM pages (40h or 41h). If bit 6 is 0, bits 0~4 select a page from ROM (00h through 1Fh).
83+ Silver, 84+: If bit 7 is set, bits 0~2 will choose any of the 8 RAM pages (80h through 87h). If bit 7 is 0, bits 0~6 on either SE will select a page from ROM (00h through 7Fh) or on 84+ regular, bits 0~5 will select a page from ROM (00h through 3Fh).
Comments
In normal circumstances this controls the page at address 4000h. The behavior of this port changes in different memory map modes. See Port 04h for details about memory map modes.
Example Uses
push af
in a,(6)
push af
ld a,1
out (6),a
; do stuff that needs page 1 swapped in
pop af
out (6),a
pop af